Publicacións en colaboración con investigadores/as de Mansoura University (22)

2024

  1. Scaling Challenges of Nanosheet Field-Effect Transistors into Sub-2 nm Nodes

    IEEE Journal of the Electron Devices Society, Vol. 12, pp. 479-485

2018

  1. FinFET versus gate-all-around nanowire FET: Performance, scaling, and variability

    IEEE Journal of the Electron Devices Society, Vol. 6, Núm. 1, pp. 332-340

  2. Modelling of nanoscale multi-gate transistors affected by atomistic interface roughness

    Journal of Physics Condensed Matter, Vol. 30, Núm. 14

  3. Spatial Sensitivity of Silicon GAA Nanowire FETs under Line Edge Roughness Variations

    IEEE Journal of the Electron Devices Society, Vol. 6, pp. 601-610

2017

  1. Metal Grain Granularity Study on a Gate-All-Around Nanowire FET

    IEEE Transactions on Electron Devices, Vol. 64, Núm. 12, pp. 5263-5269

  2. Scaling/LER study of Si GAA nanowire FET using 3D finite element Monte Carlo simulations

    Solid-State Electronics, Vol. 128, pp. 17-24

  3. Study of Strained Effects in Nanoscale GAA Nanowire FETs Using 3D Monte Carlo Simulations

    2017 47TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC)

  4. Study of strained effects in nanoscale GAA nanowire FETs using 3D Monte Carlo simulations

    European Solid-State Device Research Conference

2016

  1. 3D MC Simulations of Strain, Channel Orientation, and Quantum Confinement Effects in Nanoscale Si SOI FinFETs

    2016 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES (SISPAD)

  2. 3D MC simulations of strain, channel orientation, and quantum confinement effects in nanoscale Si SOI FinFETs

    International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

  3. Anisotropic Quantum Corrections for 3-D Finite-Element Monte Carlo Simulations of Nanoscale Multigate Transistors

    IEEE Transactions on Electron Devices, Vol. 63, Núm. 3, pp. 933-939

  4. Comparison of Fin-Edge Roughness and Metal Grain Work Function Variability in InGaAs and Si FinFETs

    IEEE Transactions on Electron Devices, Vol. 63, Núm. 3, pp. 1209-1216

  5. Scaling/LER study of Si GAA nanowire FET using 3D Finite Element Monte Carlo simulations

    2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2016

2014

  1. 3D Finite Element Schrödinger equation corrected Monte Carlo simulations of nanoscale FinFETs

    2014 International Workshop on Computational Electronics, IWCE 2014