Departamento de Electrónica e Computación
Departamento
Swansea University
Swansea, Reino UnidoPublicacións en colaboración con investigadores/as de Swansea University (67)
2024
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Scaling Challenges of Nanosheet Field-Effect Transistors into Sub-2 nm Nodes
IEEE Journal of the Electron Devices Society, Vol. 12, pp. 479-485
2022
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Multilevel 3-D Device Simulation Approach Applied to Deeply Scaled Nanowire Field Effect Transistors
IEEE Transactions on Electron Devices, Vol. 69, Núm. 9, pp. 5276-5282
2021
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Impact of metal grain granularity on three gate-all-around advanced architectures
International Conference on Simulation of Semiconductor Processes and Devices, SISPAD
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Simulations of statistical variability in n-Type FinFET, nanowire, and nanosheet FETs
IEEE Electron Device Letters, Vol. 42, Núm. 10, pp. 1416-1419
2020
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Benchmarking of FinFET, Nanosheet, and Nanowire FET Architectures for Future Technology Nodes
IEEE Access, Vol. 8, pp. 53196-53202
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Special issue: Nanowire field-effect transistor (FET)
Materials
2019
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A multi-method simulation toolbox to study performance and variability of nanowire FETs
Materials, Vol. 12, Núm. 15
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Drift-Diffusion Versus Monte Carlo Simulated ON-Current Variability in Nanowire FETs
IEEE Access, Vol. 7, pp. 12790-12797
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Impact of gate edge roughness variability on FinFET and gate-all-around nanowire FET
IEEE Electron Device Letters, Vol. 40, Núm. 4, pp. 510-513
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Toward a coordinated global observing system for seagrasses and marine macroalgae
Frontiers in Marine Science, Vol. 6, Núm. JUL
2018
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FinFET versus gate-all-around nanowire FET: Performance, scaling, and variability
IEEE Journal of the Electron Devices Society, Vol. 6, Núm. 1, pp. 332-340
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Impact of Cross-Sectional Shape on 10-nm Gate Length InGaAs FinFET Performance and Variability
IEEE Transactions on Electron Devices, Vol. 65, Núm. 2, pp. 456-462
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Modelling of nanoscale multi-gate transistors affected by atomistic interface roughness
Journal of Physics Condensed Matter, Vol. 30, Núm. 14
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Spatial Sensitivity of Silicon GAA Nanowire FETs under Line Edge Roughness Variations
IEEE Journal of the Electron Devices Society, Vol. 6, pp. 601-610
2017
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Fluctuation Sensitivity Map: A Novel Technique to Characterise and Predict Device Behaviour Under Metal Grain Work-Function Variability Effects
IEEE Transactions on Electron Devices, Vol. 64, Núm. 4, pp. 1695-1701
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Metal Grain Granularity Study on a Gate-All-Around Nanowire FET
IEEE Transactions on Electron Devices, Vol. 64, Núm. 12, pp. 5263-5269
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Scaling/LER study of Si GAA nanowire FET using 3D finite element Monte Carlo simulations
Solid-State Electronics, Vol. 128, pp. 17-24
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Study of Strained Effects in Nanoscale GAA Nanowire FETs Using 3D Monte Carlo Simulations
2017 47TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC)
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Study of strained effects in nanoscale GAA nanowire FETs using 3D Monte Carlo simulations
European Solid-State Device Research Conference
2016
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3D MC Simulations of Strain, Channel Orientation, and Quantum Confinement Effects in Nanoscale Si SOI FinFETs
2016 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES (SISPAD)