Publicaciones en las que colabora con GUILLERMO INDALECIO FERNANDEZ (39)

2018

  1. Analysis of Fluctuation Sensitivity Map Algorithms Applied to a 10nm GAA NW FET

    Proceedings of the 2018 12th Spanish Conference on Electron Devices, CDE 2018

  2. FinFET versus gate-all-around nanowire FET: Performance, scaling, and variability

    IEEE Journal of the Electron Devices Society, Vol. 6, Núm. 1, pp. 332-340

  3. FoMPy: A figure of merit extraction tool for semiconductor device simulations

    2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2018

  4. Impact of Cross-Sectional Shape on 10-nm Gate Length InGaAs FinFET Performance and Variability

    IEEE Transactions on Electron Devices, Vol. 65, Núm. 2, pp. 456-462

  5. Improving performance of iterative solvers with the AXC format using the Intel Xeon Phi

    Journal of Supercomputing, Vol. 74, Núm. 6, pp. 2823-2840

  6. MPI-Performance-Aware-Reallocation: method to optimize the mapping of processes applied to a cloud infrastructure

    Computing, Vol. 100, Núm. 2, pp. 211-226

  7. Spatial Sensitivity of Silicon GAA Nanowire FETs under Line Edge Roughness Variations

    IEEE Journal of the Electron Devices Society, Vol. 6, pp. 601-610

2016

  1. Comparison of Fin-Edge Roughness and Metal Grain Work Function Variability in InGaAs and Si FinFETs

    IEEE Transactions on Electron Devices, Vol. 63, Núm. 3, pp. 1209-1216

  2. GWMEP: Task-Manageras-a-Service in Apache CloudStack

    IEEE Internet Computing, Vol. 20, Núm. 2, pp. 42-49

  3. Scaling/LER study of Si GAA nanowire FET using 3D Finite Element Monte Carlo simulations

    2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2016

  4. Simulation study of scaled In0.53Ga0.47As and Si FinFETs for sub-16 nm technology nodes

    Semiconductor Science and Technology, Vol. 31, Núm. 7