Karol
Kalna
Publicacións nas que colabora con Karol Kalna (30)
2024
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Scaling Challenges of Nanosheet Field-Effect Transistors into Sub-2 nm Nodes
IEEE Journal of the Electron Devices Society, Vol. 12, pp. 479-485
2021
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Impact of metal grain granularity on three gate-all-around advanced architectures
International Conference on Simulation of Semiconductor Processes and Devices, SISPAD
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Simulations of statistical variability in n-Type FinFET, nanowire, and nanosheet FETs
IEEE Electron Device Letters, Vol. 42, Núm. 10, pp. 1416-1419
2020
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Benchmarking of FinFET, Nanosheet, and Nanowire FET Architectures for Future Technology Nodes
IEEE Access, Vol. 8, pp. 53196-53202
2019
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A multi-method simulation toolbox to study performance and variability of nanowire FETs
Materials, Vol. 12, Núm. 15
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Drift-Diffusion Versus Monte Carlo Simulated ON-Current Variability in Nanowire FETs
IEEE Access, Vol. 7, pp. 12790-12797
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Impact of gate edge roughness variability on FinFET and gate-all-around nanowire FET
IEEE Electron Device Letters, Vol. 40, Núm. 4, pp. 510-513
2018
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FinFET versus gate-all-around nanowire FET: Performance, scaling, and variability
IEEE Journal of the Electron Devices Society, Vol. 6, Núm. 1, pp. 332-340
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Impact of Cross-Sectional Shape on 10-nm Gate Length InGaAs FinFET Performance and Variability
IEEE Transactions on Electron Devices, Vol. 65, Núm. 2, pp. 456-462
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Modelling of nanoscale multi-gate transistors affected by atomistic interface roughness
Journal of Physics Condensed Matter, Vol. 30, Núm. 14
2017
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Metal Grain Granularity Study on a Gate-All-Around Nanowire FET
IEEE Transactions on Electron Devices, Vol. 64, Núm. 12, pp. 5263-5269
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Scaling/LER study of Si GAA nanowire FET using 3D finite element Monte Carlo simulations
Solid-State Electronics, Vol. 128, pp. 17-24
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Study of strained effects in nanoscale GAA nanowire FETs using 3D Monte Carlo simulations
European Solid-State Device Research Conference
2016
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3D MC simulations of strain, channel orientation, and quantum confinement effects in nanoscale Si SOI FinFETs
International Conference on Simulation of Semiconductor Processes and Devices, SISPAD
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Anisotropic Quantum Corrections for 3-D Finite-Element Monte Carlo Simulations of Nanoscale Multigate Transistors
IEEE Transactions on Electron Devices, Vol. 63, Núm. 3, pp. 933-939
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Comparison of Fin-Edge Roughness and Metal Grain Work Function Variability in InGaAs and Si FinFETs
IEEE Transactions on Electron Devices, Vol. 63, Núm. 3, pp. 1209-1216
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Scaling/LER study of Si GAA nanowire FET using 3D Finite Element Monte Carlo simulations
2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2016
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Simulation study of scaled In0.53Ga0.47As and Si FinFETs for sub-16 nm technology nodes
Semiconductor Science and Technology, Vol. 31, Núm. 7
2015
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3-D finite element monte carlo simulations of scaled Si SOI FinFET with different cross sections
IEEE Transactions on Nanotechnology, Vol. 14, Núm. 1, pp. 93-100
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Anisotropic schrodinger equation quantum corrections for 3D Monte Carlo simulations of nanoscale multigate transistors
18th International Workshop on Computational Electronics, IWCE 2015