DAVID
LOPEZ VILARIÑO
Profesor titular de universidade
Tese doutoral
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Contornos activos a nivel de pixeldiseño e implementación sobre arquitecturas de redes no lineales celulares 2001
Universidade de Santiago de Compostela
Teses dirixidas (5)
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3D pointcloud processing using artificial intelligence and high performance computing techniques 2024
Universidade de Santiago de Compostela
Esmorís Pena, Alberto Manuel
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From efficient airbone LIDAR data processing and classification to 3D point cloud visualisation 2020
Universidade de Santiago de Compostela
Martínez Sánchez, Jorge
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Dynamically reconfigurable architecture for embedded computer vision systems 2012
Universidade de Santiago de Compostela
Nieto Lareo, Alejandro Manuel
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Automatic pixel-parallel extraction of the retinal vascular tree: algorithm design, on-chip implementation and applications 2008
Universidade da Coruña
Alonso Montes, Carmen
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Design of a mixed-signal CMOS integrated circuit for pixel-level snakes 2003
Universidade de Santiago de Compostela
Tribunais de teses (2)
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Vogal do tribunal
Pyramidal architecture for stereo vision and motion estimation in real-time fpga-based devices 2010Universidad de Granada
Tomasi, Matteo
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Secretario do tribunal
Detection of landmines from measured infrared images using thermal modeling of the soil 2003Universidade de Santiago de Compostela