Publicacións nas que colabora con Juan Manuel Carrillo Calleja (6)


  1. An 11 mA Capacitor-Less LDO with 3.08 nA Quiescent Current and SSF-Based Adaptive Biasing

    IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 69, Núm. 3, pp. 844-848


  1. A 0.6 V, ultra-low power, 1060 μm2 self-biased PTAT voltage generator for implantable biomedical devices

    AEU - International Journal of Electronics and Communications, Vol. 137


  1. 1.88 na quiescent current capacitor-less LDO with adaptive biasing based on a SSF absolute voltage difference meter

    Proceedings - IEEE International Symposium on Circuits and Systems

  2. On-Chip Solar Energy Harvester and PMU with Cold Start-Up and Regulated Output Voltage for Biomedical Applications

    IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 67, Núm. 4, pp. 1103-1114


  1. Design methodology of a 0.7 V, 64.5 pW @ 36°C, 1830 μm2 subthreshold voltage reference for implantable devices

    2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019

  2. Ultralow power voltage reference circuit for implantable devices in standard CMOS technology

    International Journal of Circuit Theory and Applications, Vol. 47, Núm. 7, pp. 991-1005