VICTOR MANUEL
BREA SANCHEZ
Catedrático de universidade
Ricardo
Carmona Galán
Publicacións nas que colabora con Ricardo Carmona Galán (14)
2017
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In the quest of vision-sensors-on-chip: Pre-processing sensors for data reduction
IS and T International Symposium on Electronic Imaging Science and Technology
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Low-Power CMOS Vision Sensor for Gaussian Pyramid Extraction
IEEE Journal of Solid-State Circuits, Vol. 52, Núm. 2, pp. 483-495
2016
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Image feature extraction acceleration
Studies in Computational Intelligence (Springer Verlag), pp. 109-132
2014
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A 26.5 nJ/px 2.64 Mpx/s CMOS vision sensor for Gaussian pyramid extraction
European Solid-State Circuits Conference
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Form factor improvement of smart-pixels for vision sensors through 3-D vertically-integrated technologies
2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Conference Proceedings
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Gaussian pyramid extraction with a CMOS vision sensor
International Workshop on Cellular Nanoscale Networks and their Applications
2013
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A 176×120 pixel CMOS vision chip for Gaussian filtering with massivelly Parallel CDS and A/D-conversion
2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings
2012
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CMOS-3D smart imager architectures for feature detection
IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Vol. 2, Núm. 4, pp. 723-736
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In-pixel generation of gaussian pyramid images by block reusing in 3D-CMOS
ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems
2011
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A CMOS-3D reconfigurable architecture with in-pixel processing for feature detectors
2011 IEEE International 3D Systems Integration Conference, 3DIC 2011
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Switched-capacitor networks for scale-space generation
2011 20th European Conference on Circuit Theory and Design, ECCTD 2011
2010
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A 3-D chip architecture for optical sensing and concurrent processing
Proceedings of SPIE - The International Society for Optical Engineering
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In-pixel ADC for a vision architecture on CMOS-3D technology
IEEE 3D System Integration Conference 2010, 3DIC 2010
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Offset-compensated comparator with full-input range in 150nm FDSOI CMOS-3D technology
Proceedings - 2010 1st IEEE Latin American Symposium on Circuits and Systems, LASCAS 2010