Computer Architecture
COMPARCH
Universidad de Málaga
Málaga, EspañaPublications in collaboration with researchers from Universidad de Málaga (32)
2024
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CPU and GPU oriented optimizations for LiDAR data processing
Journal of Computational Science, Vol. 79
2012
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Redundant floating-point decimal CORDIC algorithm
IEEE Transactions on Computers, Vol. 61, Núm. 11, pp. 1551-1562
2009
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Computation of decimal transcendental functions using the cordic algorithm
Proceedings - Symposium on Computer Arithmetic
2008
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A low-latency pipelined 2D and 3D CORDIC processors
IEEE Transactions on Computers, Vol. 57, Núm. 3, pp. 404-417
2005
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Low latency pipelined circular CORDIC
Proceedings - Symposium on Computer Arithmetic
2003
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Blind multiuser receivers for chaos based communications
International Journal of Bifurcation and Chaos in Applied Sciences and Engineering, Vol. 13, Núm. 8, pp. 2353-2359
2002
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A configurable architecture for the wavelet packet transform
Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, Vol. 32, Núm. 3, pp. 255-273
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Architecture for wavelet packet transform based on lifting steps
Parallel Computing, Vol. 28, Núm. 7-8, pp. 1023-1037
2001
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A data parallel formulation of the barnes-hut method for N−body simulations
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
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A data-parallel formulation for divide and conquer algorithms
Computer Journal, Vol. 44, Núm. 4, pp. 303-320
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Parallelization of a recursive decoupling method for solving tridiagonal linear systems on distributed memory computer
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
2000
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An architecture for wavelet-packet based speech enhancement for hearing AIDS
ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
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Architecture for wavelet packet transform with best tree searching
Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors
1999
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Area-efficient architecture for Fast Fourier Transform
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, Vol. 46, Núm. 2, pp. 187-193
1998
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A memory system supporting the efficient SIMD computation of the two dimensional DWT
ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
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A novel design of a two operand normalization circuit
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 6, Núm. 1, pp. 173-176
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Algorithm for cosine transform of Toeplitz matrices
Electronics Letters, Vol. 34, Núm. 12, pp. 1182-1183
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Mapping and scheduling of r-arys trees onto arrays and meshes
Advances in Parallel Computing, pp. 719-722
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Radix-4 Vectoring CORDIC Algorithm and Architectures
Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, Vol. 19, Núm. 2, pp. 127-147
1997
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A probabilistic model for best-first search B&B algorithms
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)