A Worst-Case Analysis of Trap-Assisted Tunneling Leakage in DRAM Using a Machine Learning Approach

  1. Lee, J.
  2. Asenov, P.
  3. Aldegunde, M.
  4. Amoroso, S.M.
  5. Brown, A.R.
  6. Moroz, V.
Journal:
IEEE Electron Device Letters

ISSN: 1558-0563,  0741-3106

Year of publication: 2021

Volume: 42

Issue: 2

Pages: 156-159

Type: Article

DOI: 10.1109/LED.2020.3046914 GOOGLE SCHOLAR
Data source: Scopus