A dc I-V model for short-channel polygonal enclosed-layout transistors

  1. López, P.
  2. Hauer, J.
  3. Blanco-Filgueira, B.
  4. Cabello, D.
Journal:
International Journal of Circuit Theory and Applications

ISSN: 1097-007X,  0098-9886

Year of publication: 2009

Volume: 37

Issue: 2

Pages: 163-177

Type: Article

DOI: 10.1002/CTA.537 GOOGLE SCHOLAR
Data source: Scopus