Publicacións nas que colabora con Emilio López Zapata (64)

2012

  1. Redundant floating-point decimal CORDIC algorithm

    IEEE Transactions on Computers, Vol. 61, Núm. 11, pp. 1551-1562

2008

  1. A low-latency pipelined 2D and 3D CORDIC processors

    IEEE Transactions on Computers, Vol. 57, Núm. 3, pp. 404-417

2002

  1. A configurable architecture for the wavelet packet transform

    Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, Vol. 32, Núm. 3, pp. 255-273

  2. Architecture for wavelet packet transform based on lifting steps

    Parallel Computing, Vol. 28, Núm. 7-8, pp. 1023-1037

2001

  1. A data parallel formulation of the barnes-hut method for N−body simulations

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

  2. A data-parallel formulation for divide and conquer algorithms

    Computer Journal, Vol. 44, Núm. 4, pp. 303-320

  3. Parallelization of a recursive decoupling method for solving tridiagonal linear systems on distributed memory computer

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

2000

  1. An architecture for wavelet-packet based speech enhancement for hearing AIDS

    ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

  2. Architecture for wavelet packet transform with best tree searching

    Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors

1999

  1. Area-efficient architecture for Fast Fourier Transform

    IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, Vol. 46, Núm. 2, pp. 187-193

1998

  1. A memory system supporting the efficient SIMD computation of the two dimensional DWT

    ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

  2. A novel design of a two operand normalization circuit

    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 6, Núm. 1, pp. 173-176

  3. Algorithm for cosine transform of Toeplitz matrices

    Electronics Letters, Vol. 34, Núm. 12, pp. 1182-1183

  4. Radix-4 Vectoring CORDIC Algorithm and Architectures

    Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, Vol. 19, Núm. 2, pp. 127-147

1997

  1. A probabilistic model for best-first search B&B algorithms

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

  2. Error analysis and reduction for angle calculation using the CORDIC algorithm

    IEEE Transactions on Computers, Vol. 46, Núm. 11, pp. 1264-1271

  3. Finite element resolution of the 3D stationary semiconductor device equations on multiprocessors

    Integrated Computer-Aided Engineering, Vol. 4, Núm. 1, pp. 66-77

  4. High performance rotation architectures based on the radix-4 CORDIC algorithm

    IEEE Transactions on Computers, Vol. 46, Núm. 8, pp. 855-870

  5. High-performance VLSI architecture for the viterbi algorithm

    IEEE Transactions on Communications, Vol. 45, Núm. 2, pp. 168-176

  6. Mapping of Trellises Associated with General Encoders onto High-Performance VLSI Architectures

    Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, Vol. 17, Núm. 1, pp. 57-73